1. Field of the Invention
This invention relates generally to semiconductor processing, and more particularly to devices and methods to enable routing of signals generated by a semiconductor chip.
2. Description of the Related Art
One type of conventional multi-chip system may consist of multiple independently manufactured chips that are later grouped on an interposer. In this conventional system, each chip may contain one or more nodes, such as a processing core, a graphics processing unit (GPU) core or other cores or memories, connected by way of an on-chip network. The on-chip network for one chip of the system may be completely different from the other networks of the system, such as in the interposer and any other chips populating the system.
A similar problem is typically encountered in motherboard level systems, where multiple disparate components are assembled on a common motherboard. In this case, some portions of the system are generic and require some form of self-identification, such as arbitrary cards plugged into PCIe slots or arbitrary USB devices, coupled with supporting software, such as drivers. Still other interfaces are largely hard-wired into the motherboard and/or chips. This requires a fixed interconnect topology, namely the fixed topology of the motherboard, support for multiple interfaces, such as PCIe, PCI, AGP, USB, SATA, DDR3, HT, etc., and complex self-identification protocols (e.g., plug-n-play, USB). These approaches may be inferior in the context of an integrated multi-chip system that uses a uniform routing substrate, such as the same interposer architecture for multiple products, has statically configured components, and needs to route low-latency memory traffic. For example, current PCIe inter-component latencies are on the order of a few hundreds of nanoseconds and thus the tens of nanoseconds required by current PCIe translation logic is tolerable. However, future 3D-stack systems will achieve sub-10 ns inter-component latencies and thus must allow for sub-ns communication mechanisms.
The present invention is directed to overcoming or reducing the effects of one or more of the foregoing disadvantages.